/*
//###########################################################################
//
// FILE:    User_MxxV20_BIOS.cmd
//
// TITLE:   DSP281x Peripheral registers linker command file 
//
// DESCRIPTION: 
// 
//          This file is for use in BIOS applications.
//
//          Linker command file to place the peripheral structures 
//          used within the DSP281x headerfiles into the correct memory
//          mapped locations.
//
//          This version of the file does not include the PieVectorTable structure.
//          For non-BIOS applications, please use the DSP281x_Headers_nonBIOS.cmd 
//          file which includes the PieVectorTable structure.
//
//###########################################################################
//
//  Ver | dd mmm yyyy | Who  | Description of changes
// =====|=============|======|===============================================
//      | 05 Mar 2003 | D.A. | Original based on DSP281x v0.58
//  1.00| 11 Sep 2003 | L.H. | Integrated into DSP281x header files
//      |             |      | Added missing eCAN file sections
// -----|-------------|------|-----------------------------------------------
//###########################################################################
*/

MEMORY
{
 PAGE 0:    /* Program Memory */
   CSM_RSVD    : origin = 0x3F7F80, length = 0x000076     /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */

   BEGIN_FLASH : origin = 0x3F7FF6, length = 0x000002     /* Part of FLASHA.  Used for "boot to Flash" bootloader mode. */
   
   CSM_PWL     : origin = 0x3F7FF8, length = 0x000008     /* Part of FLASHA.  CSM password locations in FLASHA */
 
   FlashAB     : origin = 0x3F4000, length = 0x03f80
   FlashC_J    : origin = 0x3D8000, length = 0x1C000

   H0SARam     : origin = 0x3F8000, length = 0x2000
     
   
 PAGE 1:    /* Data Memory */
   DEV_EMU     : origin = 0x000880, length = 0x000180     /* device emulation registers */
   PIE_VECT    : origin = 0x000D00, length = 0x000100     /* PIE Vector Table */
   FLASH_REGS  : origin = 0x000A80, length = 0x000060     /* FLASH registers */
   CSM         : origin = 0x000AE0, length = 0x000010     /* code security module registers */
   XINTF       : origin = 0x000B20, length = 0x000020     /* external interface registers */
   CPU_TIMER0  : origin = 0x000C00, length = 0x000008     /* CPU Timer0 registers (CPU Timer1 and Timer2 are reserved for BIOS)*/
   PIE_CTRL    : origin = 0x000CE0, length = 0x000020     /* PIE control registers */
   ECANA       : origin = 0x006000, length = 0x000040     /* eCAN control and status registers */ 
   ECANA_LAM   : origin = 0x006040, length = 0x000040     /* eCAN local acceptance masks */
   ECANA_MOTS  : origin = 0x006080, length = 0x000040     /* eCAN message object time stamps */
   ECANA_MOTO  : origin = 0x0060C0, length = 0x000040     /* eCAN object time-out registers */
   ECANA_MBOX  : origin = 0x006100, length = 0x000100     /* eCAN mailboxes */
   SYSTEM      : origin = 0x007010, length = 0x000020     /* System control registers */
   SPIA        : origin = 0x007040, length = 0x000010     /* SPI registers */
   SCIA        : origin = 0x007050, length = 0x000010     /* SCI-A registers */
   XINTRUPT    : origin = 0x007070, length = 0x000010     /* external interrupt registers */
   GPIOMUX     : origin = 0x0070C0, length = 0x000020     /* GPIO mux registers */
   GPIODAT     : origin = 0x0070E0, length = 0x000020     /* GPIO data registers */
   ADC         : origin = 0x007100, length = 0x000020     /* ADC registers */
   EVA         : origin = 0x007400, length = 0x000040     /* Event Manager A registers */
   EVB         : origin = 0x007500, length = 0x000040     /* Event Manager B registers */
   SCIB        : origin = 0x007750, length = 0x000010     /* SCI-B registers */
   MCBSPA      : origin = 0x007800, length = 0x000040     /* McBSP registers */
   CSM_PWL     : origin = 0x3F7FF8, length = 0x000008     /* Part of FLASHA.  CSM password locations. */
/*
   M0SARam     : origin = 0x000000, length = 0x0400
   M1SARam     : origin = 0x000400, length = 0x0400*/
   M0_1SARam   : origin = 0x000000, length = 0x0800

   L0SARam     : origin = 0x008000, length = 0x2000

/**********************************************************************************/
/* Zone0 address: Used as UARTs TL16C752 */
/**********************************************************************************/
   GPS_Mem     : origin = 0x2000, length = 0x0008/*nCS_GPS*/
   YS_Mem      : origin = 0x2008, length = 0x0008/*nCS_YS*/
   TAX_Mem     : origin = 0x2010, length = 0x0008/*nCS_Tax*/
   MOB_Mem     : origin = 0x2018, length = 0x0008/*nCS_Mob*/

/**********************************************************************************/
/* Zone1 address: Used as USB ISP1761: only 8k, not 64k!!!!!!! */
/**********************************************************************************/
   EHCICapRegMem  : origin = 0x004000, length = 0x000C
   EHCIOpRegMem   : origin = 0x004020, length = 0x013C
   DcRegMem       : origin = 0x004200, length = 0x0086
   HcCfgRegMem1   : origin = 0x004300, length = 0x0010
   HcIntRegMem    : origin = 0x004310, length = 0x0020
   HcCfgRegMem2   : origin = 0x004330, length = 0x0028
   OTGRegMem      : origin = 0x004370, length = 0x0020
   

   IsoPTDMem      : origin = 0x004400, length = 0x0400
   IntPTDMem      : origin = 0x004800, length = 0x0400
   ATLPTDMem      : origin = 0x004C00, length = 0x0400

   PayLoadMem     : origin = 0x005000, length = 0x1000
   
/**********************************************************************************/
/* Zone2 address: Used as XRAM IS61LV51216.*/
/**********************************************************************************/
   XRamMem        : origin = 0x080000, length = 0x40000

/**********************************************************************************/
/* Zone6 address: Used as NOR FLASH S29GLXXXN: 64K Words / sector         */
/**********************************************************************************/
   XFlash         : origin = 0x100000, length = 0x20000
}

 
SECTIONS
{
/*** The PIE Vector table is called PIEVECT by DSP/BIOS ***/
   PieVectTableFile  : > PIE_VECT,     PAGE = 1,  TYPE = DSECT

   /* Allocate program areas: */
   .cinit              : > FlashAB          PAGE = 0
   .pinit              : > FlashAB          PAGE = 0
   .text               : > FlashAB          PAGE = 0
   
   csmpasswds          : > CSM_PWL          PAGE = 0
   csm_rsvd            : > CSM_RSVD         PAGE = 0
   
   /* Allocate uninitalized data sections: */
   .stack              : > M0_1SARam        PAGE = 1
   .ebss               : > L0SARam          PAGE = 1
   .esysmem            : > L0SARam          PAGE = 1

   /* Initalized sections go in Flash */
   /* For SDFlash to program these, they must be allocated to page 0 */
   .econst             : > FlashAB          PAGE = 0
   .switch             : > FlashAB          PAGE = 0      

      /*** User Defined Sections ***/
   .InitBoot           : > FlashAB          PAGE = 0
   .Version            : > FlashAB          PAGE = 0


   .codestart          : > BEGIN_FLASH      PAGE = 0
   /* .reset is a standard section used by the compiler.  It contains the */ 
   /* the address of the start of _c_int00 for C Code.   /*
   /* When using the boot ROM this section and the CPU vector */
   /* table is not needed.  Thus the default type is set here to  */
   /* DSECT  */ 
   .reset              : > BEGIN_FLASH      PAGE = 0, TYPE = DSECT
/*   vectors             : > VECTORS     PAGE = 0, TYPE = DSECT*/

   

/*** Peripheral Frame 0 Register Structures ***/
   DevEmuRegsFile    : > DEV_EMU,     PAGE = 1
   FlashRegsFile     : > FLASH_REGS,  PAGE = 1
   CsmRegsFile       : > CSM,         PAGE = 1
   XintfRegsFile     : > XINTF,       PAGE = 1
   CpuTimer0RegsFile : > CPU_TIMER0,  PAGE = 1  
   PieCtrlRegsFile   : > PIE_CTRL,    PAGE = 1

/*** Peripheral Frame 1 Register Structures ***/
   SysCtrlRegsFile   : > SYSTEM,      PAGE = 1
   SpiaRegsFile      : > SPIA,        PAGE = 1
   SciaRegsFile      : > SCIA,        PAGE = 1
   XIntruptRegsFile  : > XINTRUPT,    PAGE = 1
   GpioMuxRegsFile   : > GPIOMUX,     PAGE = 1
   GpioDataRegsFile  : > GPIODAT      PAGE = 1
   AdcRegsFile       : > ADC,         PAGE = 1
   EvaRegsFile       : > EVA,         PAGE = 1
   EvbRegsFile       : > EVB,         PAGE = 1
   ScibRegsFile      : > SCIB,        PAGE = 1
   McbspaRegsFile    : > MCBSPA,      PAGE = 1

/*** Peripheral Frame 2 Register Structures ***/
   ECanaRegsFile     : > ECANA,       PAGE = 1
   ECanaLAMRegsFile  : > ECANA_LAM,   PAGE = 1   
   ECanaMboxesFile   : > ECANA_MBOX,  PAGE = 1
   ECanaMOTSRegsFile : > ECANA_MOTS,  PAGE = 1
   ECanaMOTORegsFile : > ECANA_MOTO,  PAGE = 1

/*** Code Security Module Register Structures ***/
   CsmPwlFile        : > CSM_PWL,     PAGE = 1

/*** Code Security Module Register Structures ***/
/***   CsmPwlFile        : > CSM_PWL,     PAGE = 1***/

   GPSFile           : > GPS_Mem,     PAGE = 1
   YSFile            : > YS_Mem,      PAGE = 1
   TaxFile           : > TAX_Mem,     PAGE = 1
   MobFile           : > MOB_Mem,     PAGE = 1

   EHCICapFile       : > EHCICapRegMem, PAGE = 1
   EHCIOpFile        : > EHCIOpRegMem,  PAGE = 1
   HcCfgFile1        : > HcCfgRegMem1,  PAGE = 1
   HcIntFile         : > HcIntRegMem,   PAGE = 1
   HcCfgFile2        : > HcCfgRegMem2,  PAGE = 1
   OTGFile           : > OTGRegMem,     PAGE = 1
   DcFile            : > DcRegMem,      PAGE = 1
   IsoPTDFile        : > IsoPTDMem,     PAGE = 1
   IntPTDFile        : > IntPTDMem,     PAGE = 1
   BulkPTDFile       : > ATLPTDMem,     PAGE = 1
   PayLoadFile       : > PayLoadMem,    PAGE = 1
   UserDataFile      : > XRamMem,       PAGE = 1
   XFlashFile        : > XFlash,        PAGE = 1



   FuncsMap2H0SARam  :   LOAD = FlashAB, PAGE = 0
                         RUN = H0SARam, PAGE = 0
                         RUN_START(_FuncsMap2H0SARam_runstart),
                         LOAD_START(_FuncsMap2H0SARam_loadstart),
                         LOAD_END(_FuncsMap2H0SARam_loadend)

  Flash28_API:
   {
     -lFlash2812_API_V210.lib(.econst) 
     -lFlash2812_API_V210.lib(.text)
   } LOAD = FlashAB, PAGE = 0
     RUN = H0SARam,  PAGE = 0
	 RUN_START(_Flash28_API_RunStart),
     LOAD_START(_Flash28_API_LoadStart),
     LOAD_END(_Flash28_API_LoadEnd)
}


/******************* end of file ************************/